1. Field of the Invention
Embodiments of the invention relate to a single-crystal silicon carbide semiconductor switching device, and particularly relate to a silicon carbide semiconductor switching device of a surface structure of a planar metal-oxide-semiconductor field-effect transistor (MOSFET) and a method of manufacturing the silicon carbide semiconductor switching device.
2. Description of the Related Art
Single-crystal silicon carbide (SiC) has a bandgap and breakdown field strength that well exceed those of single-crystal silicon (Si), and is expected to enable realization of ultra-high voltage semiconductor switching devices exceeding a breakdown voltage of 10 kV alone or SiC devices having lower loss are expected to replace Si devices.
Metal oxide semiconductor (MOS) gate structures of MOSFETs as a silicon carbide semiconductor device are roughly divided into planar structures in which ON current flows directly under a gate electrode in a horizontal direction and trench structures in which the gate electrode is embedded in a groove (trench) formed in a silicon carbide semiconductor substrate and ON current flows along a side of the gate electrode. The planar structure does not concentrate electric field near the gate electrode and therefore, enables the breakdown voltage to be increased easily. The planar structure is suitable for quicker practical implementation because of the relatively simple structure.
However, the planar structure forms, on a flat silicon carbide substrate, a gate electrode having a certain constant thickness (typically 100 to 500 nm) and therefore, due to the unavoidable occurrence of steps caused by the gate electrode height, a problem arises in that consequent to the side wall angle (angle, etc.) of the gate electrode pattern end and the like, when the interlayer insulating film is deposited, the covering shape of the step portions overhangs, making coverage at side wall portions of the steps of the surface electrode layer (e.g., aluminum-silicon (Al—Si) film) or barrier metal (e.g., titanium nitride (TiN)) poor.
There are techniques of employing a trench structure and completely embedding the gate electrode in a gate trench to avoid the problems caused by the physical shape (for example, refer to Japanese Laid-Open Patent Publication Nos. 2011-91283 and 2012-199515, and Japanese Patent No. 5059989).
Further, as a method of resolving the overhanging of the interlayer insulating film with the planar structure as is, for example, there is a technique of using borophosphosilicate glass (BPSG) for the uppermost layer of the interlayer insulating film, performing heat treatment of several hundred degrees C. (reflow process) after formation of the film, and making the step portion a gradual incline (for example, refer to Japanese Laid-Open Patent Publication No. 2008-112824).